The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Uninterruptible Power Supplies (UPS) are often integrated into a complex datacenter architecture which includes several devices such as transformers, static switch systems (STSs) and power distribution units (PDUs). The interaction among these and the necessity to operate in high efficiency modes may affect the overall reliability of a system. The assignee of the present application has experienced in the field that when a UPS system operating on a high efficiency mode (voltage independent (VI) or voltage-frequency dependent (VFD)) has a downstream transformer, fast voltage variations due to a low impedance fault on a bypass line of the UPS may cause an in-rush current on the primary side of the transformer during the transfer from VFD/VI mode to a voltage/frequency independent (VFI) mode, where the UPS is then providing power to the load.
Referring to FIG. 1, one example of a typical data center is shown to illustrate the above described challenge. The system in the example of FIG. 1 is comprised of n-UPSs (An) connected to Static Transfer Switches (Sn) and downstream transformers (Tn). Each UPS analyzes the main line and, based on this analysis, decides when it is possible to transfer the load to one of the following high efficiency modes: VI (Voltage independent) or VFI (Voltage Frequency Independent). In case of voltage fluctuations, dips or frequency shifting, the load is transferred on inverter (VFI). When the UPS works on VFI, the output is not affected by the main power distribution voltage variation. But the high efficiency modes VI and VFI, which are often termed “input dependent” modes, need a strong control to guarantee the quality and the reliability of the power being supplied.
FIG. 2 shows a graph that illustrates the limits that need to be respected during a transfer from input dependent modes to the VFI mode, for class 1 equipment during normal operation. By “normal operation” it is meant that input failures, such as shorts on the input line, are excluded. The UPS output voltage shall remain within FIG. 2 limits during change of mode of operation, linear or no-linear load steps. Deviations with respect to the nominal voltage which do not exceed 30% in amplitude for less than 5 ms, and which are less than 0.1 millisecond in duration, are not considered. FIG. 3 shows the relation between voltage, current and magnetic induction in a transformer at the instant the primary side is switched on after an interruption. FIG. 4 further shows a typical three phase voltage (in the three phases) and the real voltage when an input failure (low impedance) is applied. The above limits (FIG. 2) describe an AC input envelope which may be tolerated by Information Technology Equipment, the extent of this (envelope) is affected when the load is resistive-capacitive (leading power factor) or resistive-inductive (lagging power factor), or when non-linear loads are being handled, which are typical in modern day datacenters.
The assignee of the present application has developed a system involving a Fast Transfer Algorithm, for which U.S. Letters Patent has been applied for, that is an optimized solution to increase the reliability of the high efficiency modes (VFD and VI) of a UPS. However, when the architecture complexity of a data center increases due to other elements/components downstream of the UPS but upstream of the load, and a low impedance failure occurs, there is no guarantee that the above described voltage variation will be within the desired thresholds for Class 1 equipment.
The data center installation may also include other devices downstream of the UPS units (such as a Static Transfer Switch or transformer), and as such the modified fast transfer algorithm needs to be integrated with an advanced control (Intelligent Transfer) which also considers the presence of different types of equipment in the data center (e.g., static transfer switches and transformers), and the effects such equipment may have on the voltage variation when the UPS transfers to the VFI mode of operation. For example, in FIG. 1, with the STS present downstream of the UPS, the UPS shall not consider the few milliseconds load interruption which is naturally generated by the change of mode of operation in case of a low impedance failure. This means the STS control should be compatible with the FAST TRANSFER time (a few milliseconds) of the mode change over to properly operate in this kind of installation, but this is not always possible. So it is necessary to provide a control algorithm, which is integrated into the UPS, which can consider also the integration of other devices downstream of the UPS but upstream of the load, which may affect the amount of current that is provided to the load.
For a typical RL or RC load, variations of a few milliseconds (e.g., 3-4 milliseconds for fast transfer) cannot affect the UPSs. But if a transformer is fitted downstream of the UPS, the interruption in supply voltage can saturate the core of the transformer. This can generate a phenomenon well known in the industry as an “in-rush current.” The in-rush current can produce a degradation of the VFD/VI mode (input dependents modes). FIG. 3 shows a typical dependence on the transformer primary side voltage variation (V), the magnetic induction (Bm) and the in-rush current (i0max), which may be generated when the transformer is switched on. To summarize, the whole system reliability is not only based on the fast transfer in this situation, but it is also necessary to avoid having the inverter become overloaded by an in-rush current. This is because the inverter has a limited current handling capability. It is also necessary to keep in mind that a STS placed upstream could move the load on the second source before the UPS transfer algorithm has completed its operation.
FIG. 4 illustrates a typical example of a three phase low impedance fault, applied on the bypass line of a UPS. The in-rush current generated during this failure could be greater than the in-rush current at the first supply because, due to the residual induction, the maximum induction could be up to three times the nominal one, and can lead the inverter of the UPS in strong current limitation. This phenomenon can be avoided if, after the load interruption (Ttransfer>1 ms) due to a low impedance fault, at the inverter startup the waveform generated by the inverter has an amplitude which is able to compensate in the first half cycle (i.e., first 10 ms) the voltage missing (area) from the point when the failure initially arises, up to the time that the change to the VFI mode of operation occurs.